1. Field of the Invention
The invention relates to a transient voltage suppressor, and more particularly, relates to a multi-channel transient voltage suppressor.
2. Description of Related Art
With rapid development of today's technology, integrated circuits have been widely applied in electronic devices. ESD (Electro Static Discharge) is one of the major problems in the field of integrated circuits and well known by person skilled in the art. Integrated circuits are prone to damages caused by an ESD event.
In conventional technical field, transient voltage suppressors (TVS) are usually used to conduct an ESD protection. Referring to FIG. 1A, which illustrates a circuit diagram of a conventional low-capacitance transient voltage suppressor. A transient voltage suppressor 100 includes a Zener diode ZD1 and a plurality of diodes DU11 to DU22, and DD11 to DD22. In order to reduce equivalent capacitances on current dissipation paths provided by the transient voltage suppressor, one or more diodes are usually arranged between input output terminals IOA1 and IOA2 and a power terminal PWR and between the input output terminals IOA1 and IOA2 and a ground terminal GND in conventional technical field so the equivalent capacitances on the current dissipation paths may be reduced through parasitic capacitances on the diodes connected in series.
However, as the number of channels of the transient voltage suppressor increases, the diodes additionally arranged on each channel may cause a circuit area required by the transient voltage suppressor to increase significantly (referring to a circuit diagram of a conventional multi-channel low-capacitance transient voltage suppressor as illustrated in FIG. 1B) and thereby dramatically increase circuit costs.